Morris Mano - Digital Design 6th Edition Solutions __top__

4.2) (a) 2-to-4 decoder, (b) 4-to-1 multiplexer

1.2) (a) 1010, (b) 1101, (c) 1111, (d) 1000

2.3) (a) 110101, (b) 101101, (c) 111101, (d) 100101 Morris Mano Digital Design 6th Edition Solutions

4.3) (a) 3-bit binary adder, (b) 4-bit binary subtractor

6.1) (a) 4-bit shift register, (b) 3-bit Johnson counter 4.2) (a) 2-to-4 decoder

1.3) (a) 10, (b) 11, (c) 101, (d) 110

5.2) (a) Positive edge-triggered, (b) Negative edge-triggered (b) 4-to-1 multiplexer 1.2) (a) 1010

7.1) (a) 256 x 8 ROM, (b) 512 x 4 RAM

5.1) (a) SR latch, (b) D flip-flop